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Abstract : |
Power and energy are increasingly becoming a limitation for microprocessor design. Modern microprocessors employ a number of techniques to reduce energy consumption. Since modern architectures typically waste activity on speculative execution, prior work has explored micro-architectural mechanisms for speculation control. These techniques attempt to adjust the excess speculation in the micro-architecture, but typically seek heuristics that target an "iso-performance " goal-- power is reduced, but never at the expense of performance. We argue that this strategy will have limited energy savings because the system performance goal is not clearly articulated to the micro-architecture. We propose that software, including a combination of the operating system and applications, should use a performance mechanism to indicate the desired performance and allow the micro-architecture to then choose between extant methods to achieve that performance while reducing power usage. We demonstrate this using an architectural mechanism that dynamically chooses between different processor configurations (pipeline gating, in-order issue and out-of-order issue) based on the stated performance goals. 1, |
