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Abstract : |
The existence of false paths represents a significant and computationally complex problem in computing the delay of combinational and sequential circuits. Existing research work on circuit delay computation by taking false paths into account has focused on three main areas: gate delay models, path sensitization models, and associated algorithms. In this paper we conduct a comprehensive study on modeling circuit delay computation as a sequence of instances of propositional satisfiability. Several path sensitization models and gate delay models are studied. In addition we evaluate several algorithms for propositional satisfiability seeking to identify which are, |
