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Optimization of Supply Voltage Assignment for Power Reduction on Processor-Based Systems


Author(s) : Hiroto Yasuura Tohru Ishihara, 
Publisher : N/A
Publication Date : 1997
ISSN : N/A
Abstract : In this paper we propose a system level power optimization problem: A problem to assign optimal VDD to each job under a time constraint. The objective function is total energy for the processing of all jobs. The proposed voltage assignment method consists of following two concepts. ffl If some jobs are processed on single processor system under a time constraint, assigning lower supply voltage to the set of jobs whose time constraint is loose. ffl If some jobs are processed under a time constraint and the switched capacitances ( (load capacitance) 2 (switching activity)) of jobs are different each other, assigning lower supply voltage to the heavier jobs and higher voltage to the lighter jobs. We define the VDD assignment problem and formulate it as an integer linear programming (ILP) problem. An optimal assignment can be obtained by solving the ILP problem. Experimental results show that the proposed method reduces total energy consumption dramatically without being noticed a performance reduction. I.,