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Derivation of a DRAM memory interface by sequential decomposition


Author(s) : Steven D. Johnson Bhaskar Bose Bhaskar Bose Kamlesh Rath Kamlesh Rath Steven D. Johnson, 
Publisher : N/A
Publication Date : 1993
ISSN : N/A
Abstract : Design and synthesis of DRAM based memory systems has been a difficult task in high-level system synthesis because of the relatively complex protocols involved. In this paper, we illustrate a method for topdown design of a DRAM memory interface using a transformational approach. Sequential decomposition of the DRAM memory interface entails extraction of a DRAM memory object from a system description that incorporates the read/write protocol and accounts for refresh cycles. We apply sequential decomposition to a non-trivial example, a formally derived realization of the Nqthm FM9001 microprocessor specification [1], called DDD-FM9001 [2]. 1,