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Data access microarchitectures for superscalar processors with compiler-assisted data prefetching


Author(s) : Pohua P. Chang Scott A. Mahlke William Y. Chen Wen-mei W. Hwu, 
Publisher : N/A
Publication Date : 1991
ISSN : N/A
Abstract : The performance of superscalar processors is more sensitive to the memory system delay than their single-issue predecessors. This paper examines alternative data access microarchitectures that effectively support compilerassisted data prefetching in superscalar processors. In particular, a prefetch buffer is shown to be more effective than increasing the cache dimension in solving the cache pollution problem. All in all, we show that a small data cache with compiler-assisted data prefetching can achieve a performance level close to that of an ideal cache. 1,