CA-BIST for asynchronous circuits: A case study on the RAPPID asynchronous instruction length decoder
| Author(s) : | Parimal Pal Chaudhuri Shai Rotem Rajesh Pendurkar Ken Stevens Marly Roncken Pentium R, |
| Publisher : | N/A |
| Publication Date : | 2000 |
| ISSN : | N/A |
| Abstract : | This paper presents a case study in low-cost noninvasive Built-In Self Test (BIST) for RAPPID, a largescale 120,000-transistor asynchronous version of the, |