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Abstract : |
Fault simulation for sequential circuits numbers among the highly compute-intensive tasks in the integrated circuit design process. In the quest for rapid design turn-around, parallelization has been proposed to speed fault simulation. In this paper, we introduce ProperPROOFS, a parallel extension of the PROOFS fault simulation package. ProperPROOFS exploits parallelism based on fault partitioning, incorporating static and dynamic partitioning schemes and a new asynchronous and distributed method of fault redistribution. We present results for circuits in the ISCAS89 benchmark set across several parallel architectures. A detailed evaluation of results provides new insight into the use of fault partitioning to parallelize high performance serial fault simulation applications. 1, |
