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Abstract : |
One of the major challenges in designing computationally versatile routers, especially routers at the network edge, is to simultaneously provide both high packet forwarding performance and versatile packet processing capabilities. The diverse nature of packet processing dictates that router architectures be based upon general-purpose processors. However, the performance limitations of general-purpose I/O architectures, accruing from limited I/O bus bandwidth, interrupt overheads and synchronization overheads, limit the level of achievable packet forwarding performance. This paper describes a scalable edge router architecture called Suez, that utilizes clustering and programmability of network interfaces, to systematically eliminate these overheads. The first Suez prototype, based upon a cluster of Pentium-II PC's, Lanai 4:X network processors, and a 10-Gbits/sec Myrinet interconnect, shows that for a single path through a Suez router, this prototype can achieve a byte throughput of 445:7 Mbits/sec for large best-effort packets (4096 bytes), a packet throughput of 91:5 Kpackets /sec for small best-effort packets (64 bytes), a realtime byte throughput of 132:7 Mbits/sec, and a packet throughput of 196:3 Kpackets/sec for small real-time packets (64 bytes). The resulting system provides a high-performance substrate over which a general computation framework can be efficiently placed., |
