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Abstract : |
This paper gives details of the design of a switched capacitor circuit for use in oversampling sigma-delta analogue-to-digital converters. The circuit is a fourth-order cascade of two second-order sections. Comparison with other multistage structures is also presented. It is shown that the proposed design has advantages over the possible alternative cascade of four first-order sections. It is also shown that it gives certain improvements in performance over the popular third-order cascade of a second-order and a first-order section, thus justifying the use of a higher order under the given technology and tolerance constraints., |
